? semiconductor components industries, llc, 2011 june, 2011 ? rev. 5 1 publication order number: nlas7222b/d nlas7222b, nlas7222c high-speed usb 2.0 (480 mbps) dpdt switches on semiconductor?s nlas7222b and nlas7222c are part of a series of analog switch circuits that are produced using the company?s advanced sub ? micron cmos technology, achieving industry ? leading performance. both the nlas7222b and nlas7222c are 2 ? to 1 ? port analog switches. their wide bandwidth and low bit ? to ? bit skew allow them to pass high ? speed differential signals with good signal integrity. each switch is bidirectional and offers little or no attenuation of the high ? speed signals at the outputs. industry ? leading advantages include a propagation delay of less than 250 ps, resulting from its low channel resistance and low i/o capacitance. their high channel ? to ? channel crosstalk rejection results in minimal noise interference. their bandwidth is wide enough to pass high ? speed usb 2.0 differential signals (480 mb/s). features ? r on is typically 8.0 at v cc = 3.3 v ? low crosstalk: ? 30 db @ 250 mhz ? low current consumption: 1.0 a ? channel on ? capacitance: 8.0 pf (typical) ? v cc operating range: 1.65 v to 4.5 v ? > 700 mhz bandwidth (or data frequency) ? these are pb ? free devices typical applications ? differential signal data routing ? usb 2.0 signal routing important information ? continuous current rating through each switch 300 ma ? 8 kv i/o to gnd esd protection http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information http://onsemi.com marking diagram xx = device code 7222b = as 7222c = at m = date code = pb ? free device 1 uqfn10 case 488at (note: microdot may be in either location) xx m
nlas7222b, nlas7222c http://onsemi.com 2 figure 1. pin connections and logic diagram (nlas7222b, top view) 8 9 10 12 76 5 4 3 hsd1+ hsd2+ hsd1 ? hsd2 ? d ? gnd d+ oe v cc s control figure 2. pin connections and logic diagram (nlas7222c, top view) 8 9 10 12 76 5 4 3 hsd1+ hsd1 ? d+ d ? hsd2+ hsd2 ? gnd oe v cc s control table 1. pin description pin function s select input oe output enable hsd1+, hsd1 ? , hsd2+, hsd2 ? , d+, d ? data ports table 2. truth table oe s hsd1+, hsd1 ? hsd2+, hsd2 ? 1 0 0 x 0 1 off on off off off on maximum ratings symbol pins parameter value unit v cc v cc positive dc supply voltage ? 0.5 to +5.5 v v is hsd1+, hsd1 ? hsd2+, hsd2 ? analog signal voltage ? 0.5 to v cc + 0.3 v d+, d ? ? 0.5 to +5.5 v in s, oe control input voltage, output enable voltage ? 0.5 to +5.5 v i cc v cc positive dc supply current 50 ma t s storage temperature ? 65 to +150 c i is_con hsd1+, hsd1 ? hsd2+, hsd2 ? , d+, d ? analog signal continuous current ? closed switch 300 ma i is_pk hsd1+, hsd1 ? hsd2+, hsd2 ? , d+, d ? analog signal continuous current 10% duty cycle 500 ma i in s, oe control input current, output enable current 20 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. recommended operating conditions symbol pins parameter min max unit v cc positive dc supply voltage 1.65 4.5 v v is hsd1+, hsd1 ? hsd2+, hsd2 ? analog signal voltage gnd v cc v d+, d ? gnd 4.5 v in s, oe control input voltage, output enable voltage gnd v cc v t a operating temperature range ? 40 + 85 c minimum and maximum values are guaranteed through test or design across the recommended operating conditions, where applicable. typical values are listed for guidance only and are based on the particular conditions listed for section, where ap plicable. these conditions are valid for all values found in the characteristics tables unless otherwise specified in the test conditions .
nlas7222b, nlas7222c http://onsemi.com 3 esd protection symbol parameter value unit esd human body model ? all pins 2.0 kv esd human body model ? i/o to gnd 8.0 kv dc electrical characteristics control input, output enable (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max v ih s, oe control input, output enable high voltage (see figure 3) 2.7 3.3 4.2 1.3 1.4 1.6 ? ? v v il s, oe control input, output enable low voltage (see figure 3) 2.7 3.3 4.2 ? 0.4 0.4 0.5 v i in s, oe control input, output enable leakage current 0 v is v cc 1.65 ? 4.5 ? ? 1.0 a supply and leakage current (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max i cc v cc quiescent supply current v is = v cc or gnd; i out = 0 a 1.65 ? 4.5 ? ? 1.0 a i cct v cc increase in i cc per control voltage v in = 2.6 v 3.6 ? ? 10 a i oz hsd1+, hsd1 ? hsd2+, hsd2 ? off state leakage current 0 v is v cc 1.65 ? 4.5 ? ? 1.0 a i off d+, d ? power off leakage current 0 v is 4.5 v 0 ? ? 1.0 a high speed on resistance (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max r on on ? resistance v is = 0 v to 0.4 v, i on = 8 ma 2.7 3.3 4.2 ? 9.0 8.0 7.0 12 10 8.0 r flat on ? resistance flatness v is = 0 v to 1.0 v, i on = 8 ma 2.7 3.3 4.2 ? 1.6 1.5 1.4 ? r on on ? resistance matching v is = 0 v to 0.4 v, i on = 8 ma 2.7 3.3 4.2 ? 1.05 0.85 0.65 ?
nlas7222b, nlas7222c http://onsemi.com 4 dc electrical characteristics (continued) full speed on resistance (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max r on on ? resistance v is = 0 v to v cc , i on = 8 ma 2.7 3.3 4.2 9.0 8.5 7.5 12 10.5 8.5 r flat on ? resistance flatness v is = 0 v to 1.0 v, i on = 8 ma 2.7 3.3 4.2 1.6 1.5 1.4 r on on ? resistance matching v is = 0 v to v cc , i on = 8 ma 2.7 3.3 4.2 2.20 2.45 2.65 ac electrical characteristics timing/frequency (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max t on closed to open turn ? on time 1.65 ? 4.5 ? 14 30 ns t off open to closed turn ? off time 1.65 ? 4.5 ? 10 20 ns t bbm break ? before ? make delay 1.65 ? 4.5 3.0 4.4 7.0 ns bw ? 3 db bandwidth c l = 5 pf 1.65 ? 4.5 ? 500 ? mhz c l = 0 pf ? 750 ? isolation (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max o irr open off ? isolation f = 250 mhz 1.65 ? 4.5 ? ? 22 ? db x talk hsd1+ to hsd1 ? non ? adjacent channel crosstalk f = 250 mhz 1.65 ? 4.5 ? ? 30 ? db nlas7222b capacitance (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions ? 40 c to +85 c unit min typ max c in s, oe control pin input capacitance v cc = 0 v ? 3.0 ? pf c on d+ to hsd1+ or hsd2+ on capacitance v cc = 3.3 v; oe = 0 v s = 0 v or 3.3 v ? 8.0 ? pf c off hsd1n or hsd2n off capacitance v cc = v is = 3.3 v; oe = 0 v s = 3.3 v or 0 v ? 4.5 ? pf
nlas7222b, nlas7222c http://onsemi.com 5 nlas7222c capacitance (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions ? 40 c to +85 c unit min typ max c in s, oe control pin, output enable in- put capacitance v cc = 0 v ? 3.0 ? pf c on d+ to hsd1+ or hsd2+ on capacitance v cc = 3.3 v; oe = 0 v s = 0 v or 3.3 v ? 10 ? pf c off hsd1n or hsd2n off capacitance v cc = v is = 3.3 v; oe = 3.3 v s = 3.3 v or 0 v ? 5.5 ? pf
nlas7222b, nlas7222c http://onsemi.com 6 figure 3. i cc vs. v in 0 20 40 60 80 100 120 140 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 v cc = 4.2 v v cc = 3.3 v v cc = 2.7 v v in , (v) i cc , ( a) figure 4. t bbm (time break ? before ? make) output dut 50 35 pf v cc switch select pin output input v cc gnd figure 5. t on /t off 50% 50% 90% 90% t on t off v oh output input v cc 0 v figure 6. t on /t off dut open 35 pf v cc input 50% 50% 10% t on t off output input v cc 0 v 10% 50 0.1 f t bmm output v out v ol v out v oh v ol dut open v cc input output 50 35 pf v out 0.1 f 50 % of droop voltage droop
nlas7222b, nlas7222c http://onsemi.com 7 channel switch control/s test socket is normalized. off isolation is measured across an off channel. on loss is the bandwidth of an on switch. v iso , bandwidth and v onl are independent of the input signal direction. v iso = off channel isolation = 20 log for v in at 100 khz v onl = on channel loss = 20 log for v in at 100 khz to 50 mhz bandwidth (bw) = the frequency 3 db below v onl v ct = use v iso setup and test to all other switch analog input/outputs terminated with 50 output dut input 50 50 generator reference transmitted figure 7. off channel isolation/on channel loss (bw)/crosstalk (on channel to off channel)/v onl 50 v out v in v out v in
nlas7222b, nlas7222c http://onsemi.com 8 applications information the low on resistance and capacitance of the nlas7222b provides for a high bandwidth analog switch suitable for applications such as usb data switching. results for the usb 2.0 signal quality tests will be shown in this section, along with a description of the evaluation test board. the data for the eye diagram signal quality and jitter tests verifies that the nlas7222b can be used as a data switch in low, full and high speed usb 2.0 systems. figures 8, 9 and 10 provide a description of the test evaluation board. the usb tests were conducted per the procedures provided by the usb implementers forum ( www.usb.org ), the industry group responsible for defining the usb certification requirements. the test patterns were generated by a pc and matlab software, and were inputted to the analog switch through usb connectors j1 (hsd1) or j2 (hsd2). a usb certified device was plugged into connector j4 to function as a data transceiver. the high speed and full speed tests used a flash memory device, while the low speed tests used a mouse. test connectors j3 and j5 provide a direct connection of the usb device and were used to verify that the analog switch does not distort the data signals. figure 8. schematic of the nlas7222b usb demo board
nlas7222b, nlas7222c http://onsemi.com 9 figure 9. block diagram of the nlas7222b usb demo board figure 10. photograph of the nlas7222b usb demo board ordering information device marking package shipping ? nlas7222bmutag as uqfn10 (pb ? free) 3000 / tape & reel nlas7222bmutbg as uqfn10 (pb ? free) 3000 / tape & reel nlas7222cmutbg at uqfn10 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
nlas7222b, nlas7222c http://onsemi.com 10 package dimensions uqfn10, 1.4x1.8, 0.4p case 488at ? 01 issue a a b a1 0.05 c seating plane note 3 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. dim min max millimeters a 1.40 bsc a1 0.40 bsc 0.45 0.60 b d 0.30 0.50 e e l l1 0.00 0.05 pin 1 reference d a e b 0.10 c 2x 0.10 c 2x 0.05 c c l3 10 1 3 5 6 0.05 c 0.10 ca b 10 x e e/2 l 9 x 0.00 0.15 1.80 bsc 0.15 0.25 mounting footprint 10 x pitch 1 9 x scale 20:1 0.663 0.0261 0.200 0.0079 0.400 0.0157 0.225 0.0089 2.100 0.0827 1.700 0.0669 0.563 0.0221 mm inches 10x l1 detail a bottom view (optional) l3 0.40 0.60 0.127 ref a3 top view side view bottom view on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 nlas7222b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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